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Light travels at one foot per nanosecond. So a processor one foot wide you'd expect to run at 1 GHz max.


That's only if you needed a signal to cross the whole chip in one cycle. There's no such limitation preventing a 1 foot wide chip from being filled with 5ghz cores on an appropriate ring bus.


But then you have many cores. With 3d scaling you could make a bigger core and still have high hz.


something something quantum tunnelling for probabilistic FTL signalling (/s)


Only if it is so badly designed that data needs to cross the entire dye's cross section.


Look at how much space cache uses on a die.


The core would use cache near it? Memory access delay such as caches is not considered part of cpu frequency either afaik.


Cache takes X number of cycles to return a result

You can make X lower by reducing the frequency (= having each cycle be longer)

But apart for that, the main reason big chips would clock slower is power, not timing. If you have a lot of transistors all switching on a high voltage so that the frequency is high, you get molten metal and the magic smoke leaves.

Big chips aren't one big stage where light travels from one side to the other. But they are giant weaves of heating elements that can't all run fast all of the time


cache latency is definitely part of what limits core clock. you're not going to have a good time if your L1 latency is, say 10 clocks. not to mention the fact that register files are not much different than SRAM (therefore cache-like).


Fair enough, to measure real world performance you're right anf that's all that should matter anyways.


Isn't Apple M3 larger in size than other Arm CPUs? Still, they don't run slower.


Akselos | Devops, Frontend | Boston/Houston | Partially Onsite | https://akselos.com

Akselos has unique technology to perform large-scale, physics-based simulations. One of our focuses is creating digital twins of critical infrastructure. As a recent example, we were part of a team that received a grant to develop digital twins of floating wind turbines[1].

We're a growing company and we're looking for a devops engineer to help develop and maintain our cloud servers (Python/GCP/Slurm/Linux). We also have room for help with our desktop application (Python/Qt/QML/OpenGL), and our web-based application (Javascript/React).

Let us know what your skills and interests are and we can see if you're a fit. Email info@akselos.com .

[1] https://www.rechargenews.com/wind/principle-power-wins-us-3-...


Akselos | Devops, Frontend | Boston, Houston | Onsite | https://akselos.com

Akselos has unique technology to perform large-scale, physics-based simulations. One of our focuses is creating digital twins of critical infrastructure. As a recent example, we were part of a team that received a grant to develop digital twins of floating wind turbines[1].

We're a growing company and we're looking for a devops engineer to help develop and maintain our cloud servers (Python/GCP/Slurm/Linux). We also have room for help with our desktop application (Python/Qt/QML/OpenGL), and our web-based application (Javascript/React).

Our development team is small; let us know what your skills and interests are and we can see if you're a fit.

Apply at https://akselos.com/about/careers/

[1] https://www.rechargenews.com/wind/principle-power-wins-us-3-...


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