yeah, if you're not trying to replicate design blunders like the 99/4a you can probably do a lot better; the mup21 showed that if you're making an asic and willing to depart radically from the conventional wisdom you can get a crtc and a one-clock-per-instruction†20-bit cpu with a pretty high clock speed into 7000 transistors, less than a z80
in the crtc design space i think there's significant unexplored territory around polynomial interpolation that could allow you to get by with a lot less memory than you need for a whole framebuffer. but it'll probably stay unexplored because it's nowadays a lot more practical to just whack a up5k or something in there, and that has plenty of memory
______
†offer not valid for addition instructions, additional stack manipulation fees may apply, multipliers sold separately, your mileage may vary
in the crtc design space i think there's significant unexplored territory around polynomial interpolation that could allow you to get by with a lot less memory than you need for a whole framebuffer. but it'll probably stay unexplored because it's nowadays a lot more practical to just whack a up5k or something in there, and that has plenty of memory
______
†offer not valid for addition instructions, additional stack manipulation fees may apply, multipliers sold separately, your mileage may vary