Knowing very little about the low-end micro-controller manufacturing economics, isn't there some kind of lower bound limit where the marginal cost of the chip itself is utterly dwarfed by the cost of the pins and packaging?
Sure, a 32-bit chip is bound to be bigger than an equivalent 8 or 16-bit one, but e.g. the pulpino project has designed a 32-bit one using only 11.6 kGE. Not very much nowadays. For comparison, according to someone from Atmel, the AVR core is 12k gates, and megaAVR is 20k gates (https://www.embeddedrelated.com/showthread/comp.arch.embedde... ).
I have no idea. They've probably optimized the hell out of it in ways we can't understand. I mean, I thought about getting academics to cover cost of putting Leon3 or RISC-V on a cutting-edge node where 32-bit would be so cheap FOSS could undercut them. They'd need to do peripherals, too, but EE students always need projects to learn with. :) The MOSIS runs I saw at the time had packaging alone at $10-20 a chip. I know it goes down for higher volume but how low can I get it on a new product doing maybe 10,000/units a year?
Well, let me show you how low they get it so you know what your reusable-for-better-products micro would compete with:
The smallest one is designed, masked, printed on silicon, packaged and sold in 5k quantities at 24 cents a chip at a profit! That's nuts! I can only imagine what the 4-bitters cost. The cheapest 32-bitter I found were 32-bit NXP's at 10,000 units for about 50 cents. So, they're getting there. It's an understatement, though, to say the manufacturing costs are highly competitive in this sector. :)
Sure, a 32-bit chip is bound to be bigger than an equivalent 8 or 16-bit one, but e.g. the pulpino project has designed a 32-bit one using only 11.6 kGE. Not very much nowadays. For comparison, according to someone from Atmel, the AVR core is 12k gates, and megaAVR is 20k gates (https://www.embeddedrelated.com/showthread/comp.arch.embedde... ).